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[Develop Tools] Verilog Coding Style for Efficient Digital Design.

Description: Verilog Coding Style for Efficient Digital Design
Platform: | Size: 80961 | Author: 虞亮 | Hits:

[Books] Verilog Coding Style for Efficient Digital Design.

Description: Verilog Coding Style for Efficient Digital Design
Platform: | Size: 80896 | Author: 虞亮 | Hits:

[Applications] RS encoder(Verilog)

Description: RS编码的源代码使用Verilog在Xinloinx平台-RS coding using the source code in Verilog Xinloinx platform
Platform: | Size: 5120 | Author: 王锋 | Hits:

[VHDL-FPGA-Verilog] Viterbidecoder

Description: 维特比解码器低功耗设计verilog编码完整的程序可直接用-Viterbi decoder low power design Verilog coding complete procedures can be used directly
Platform: | Size: 386048 | Author: 杨艺 | Hits:

[VHDL-FPGA-Verilog] syn_fifo

Description: 同步FIFO的verilog编码 -synchronous FIFO verilog coding synchronous FIFO verilog Synchronous Code FI FOR the verilog coding synchronous FIFO verilog coding
Platform: | Size: 1024 | Author: | Hits:

[Graph program] color_space_converters

Description: YCrCb到RGB的变换以及RGB到YCrCb的反变换，可用于视频采集等领域，verilog编码，modelsim验证-YCrCb to RGB and RGB to the YCrCb transform the inverse transform can be used in areas such as video capture, verilog coding, modelsim authentication
Platform: | Size: 7168 | Author: mayang | Hits:

[VHDL-FPGA-Verilog] crccode

Description: CRC循环冗余检验 Verilog 编码程序-CRC cyclic redundancy test Verilog coding procedures
Platform: | Size: 1024 | Author: yuanxiaonan | Hits:

[VHDL-FPGA-Verilog] SST39VF3201

Description: flash interface controller, verilog coding
Platform: | Size: 299008 | Author: jason | Hits:

[VHDL-FPGA-Verilog] verilog_cookbook

Description: 本電子檔為 verilog cookbook,包含了通訊,影像,DSP等重要常用之verilog編碼,可作為工程師與初學者的參考手冊-The electronic file for verilog cookbook, includes communications, imaging, DSP and other important commonly used Verilog coding, can be used as engineer with the reference manual for beginners
Platform: | Size: 2847744 | Author: siman,Chen | Hits:

[VHDL-FPGA-Verilog] RS232_pro

Description: RS232 verilog coding 全参数化设计 可以自己设定波特率 时钟频率等 完全FPGA实现调通-RS232 verilog coding the entire parametric design can set the baud rate clock frequency of FPGA to achieve complete transfer pass
Platform: | Size: 2048 | Author: dinsh | Hits:

[VHDL-FPGA-Verilog] RS_204_188_decoder

Description: 使用verilog完成了RS编码的设计，编码参数为输入188，输出204-The use of Verilog coding RS completed the design, coding parameters for the importation of 188, the output 204
Platform: | Size: 14336 | Author: 小米 | Hits:

[Software Engineering] StateMachineCodingStylesforSynthesis

Description: 关于verilog编码风格的文章，写得不错，值得反复阅读。-Verilog coding style on the article, written well, it is worth reading again.
Platform: | Size: 123904 | Author: Kevin | Hits:

[VHDL-FPGA-Verilog] Verilog_coding_study

Description: verilog coding study book ---) -verilog coding study book---)
Platform: | Size: 6961152 | Author: rex | Hits:

[VHDL-FPGA-Verilog] 12_coding_guidelines

Description: VHDL代码编写规范与风格，XILINX培训用教材，WORD文档的，写得特好，只不过是E文的-VHDL coding and style norms, XILINX training materials, WORD documents, and written special good, but is E-man
Platform: | Size: 154624 | Author: 邓子龙 | Hits:

[VHDL-FPGA-Verilog] Verilog--coding--style

Description: Verilog可综合代码编写风格介绍。属于HW中央逻辑开发部的绝密资料，加上本人的总结而成。喷血推荐。-The coding style of Verilog language. It is very useful for verilog system developer
Platform: | Size: 448512 | Author: liangyao | Hits:

[VHDL-FPGA-Verilog] Coding-style-and-guidelines-of-HDL

Description: 该资料对数字设计的编码风格、编码规范给出了详细介绍，并简介了VHDL、verilog的编码要点。-The information on the coding style of digital design, coding specification gives a detailed description and profile of VHDL, verilog coding points.
Platform: | Size: 63488 | Author: zxc | Hits:

[VHDL-FPGA-Verilog] Verilog-Coding-Style-Proposal_final

Description: Verilog 开发规范 让你的程序易读易用-verilog coding style
Platform: | Size: 2023424 | Author: 赵胜 | Hits:

[VHDL-FPGA-Verilog] Verilog-coding-style-in-asic-design

Description: 该文档描述了ASIC芯片设计的verilog编程规范，这对芯片的正常流片极重要。-This document describes the verilog coding style in asic design.
Platform: | Size: 167936 | Author: 江豪 | Hits:

[VHDL-FPGA-Verilog] verilog

Description: 里面包括乘法器等多个verilog编码整理，大多数的编码应该都在内(It includes multiple Verilog coding collation, such as multiplier, and most of the codes should be included)
Platform: | Size: 5120 | Author: 羽霜梦琳 | Hits:

[Books] Verilog coding for logic synthesis

Description: 一本英语verilog HDL 图书,讲解很详细，锻炼英语，提高英语(a book with verilog HDL)
Platform: | Size: 1254400 | Author: ldqzhh | Hits:
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